A 10-bit SAR ADC with AFE for Solar Energy Applications
Abstract
This work presents the development of a 10-bit fully differential successive-approximation (SAR) analog-to-digital converter (ADC) integrated with a configurable analog front-end (AFE) targeting sensing applications, including current and high-voltage monitoring. The AFE provides two acquisition modes: a high-gain current measurement path and a unity-gain voltage measurement path capable of handling input levels up to 65 V through external attenuation networks. A fully-differential programmable-gain amplifier with auto-zero calibration mitigates offset and improves precision in low-level signal acquisition. The SAR core employs a VCM-based capacitive DAC switching scheme to reduce switching energy and maintain stable common-mode operation. The digital interface, described in SystemVerilog, includes configurable resolution and sampling parameters, supporting both single and scan conversion modes, continuous operation, interrupt generation, DMA requests, and a hardware oversampling filter for improved effective resolution. The system was designed using a 130 nm process. Behavioral verification in Verilog-A/AMS, together with mixed-signal simulation, enabled performance evaluation and model portability across EDA environments. Post-layout simulation results demonstrate that the SAR ADC achieved an ENOB of 8.71 bits and a linearity performance (INL/DNL) of 0.30/0.32 LSB , operating at a sample rate of 166.7 kHz.