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Author

Romar Parcon

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#graph neural networks Open access Sep 2026

Deep Learning Applications for Circuit Optimization and Hardware Organization

Abstract Traditional Electronic Design Automation (EDA) logic synthesis struggles with NP-hard state-space explosions as hardware scales to billions of gates. This paper explores deep learning paradigms specifically Graph Neural Networks (GNNs), Reinforcement Learning (RL), and generative transformers to accelerate dig...

Romar Parcon · 0 citations
#graph neural networks Open access Sep 2026

Deep Learning Applications for Circuit Optimization and Hardware Organization

Abstract Traditional Electronic Design Automation (EDA) logic synthesis struggles with NP-hard state-space explosions as hardware scales to billions of gates. This paper explores deep learning paradigms specifically Graph Neural Networks (GNNs), Reinforcement Learning (RL), and generative transformers to accelerate dig...

Romar Parcon · 0 citations

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