Sep 2026· 2026 International Ural Conference on Electrical Power Engineering (UralCon)· pp. 816-820· 0 citations· 22 references
Abstract
This paper develops a reliability model for a lowcost data acquisition platform built around a Raspberry Pi 4 and an MCP3008 converter. The available registration summary reports 1,304,600 stored rows over 51.88 s, corresponding to 25.15 krows/s and confirming operation at the target throughput scale. The scientific contribution is an analytical and reproducible Monte Carlo reliability envelope for the two-stage logger. The shared record buffer is represented as a finite discrete-time queue with Poisson arrivals, lognormal writer capacity, and one lognormal storage stall. Twenty-eight combinations of buffer capacity and mean stall duration were evaluated with 2,000 runs each using condition-specific deterministic streams derived from a fixed seed. At arrival and writer rates of 25 and 35 krecords/s, respectively, a 200,000-record buffer had overflow probabilities of 0, 0.0150, 0.7245, and 0.9980 for mean stalls of 4, 6, 8, and 10 s. Median retained fractions for 8 and 10 s were 0.9917 and 0.9584. The derived stability, stall-tolerance, and recovery relations provide quantitative design rules for buffer sizing, writer capacity, and diagnostic instrumentation.
Abstract Storage reliability is critical for systems that remain dormant throughout their lifecycle, particularly for mission-critical infrastructure such as radiation detection warning systems and various military defense applications. Typically, operational reliability is not always 100% at the onset of storage, and...
Yi-Fan Zhang, Yong-Jin Zhang, H. Du et al.· Communications in Statistics...· 0 citations
The results indicate that conventional performance metrics alone may not be sufficient to evaluate system reliability under unstable power conditions, and highlights the importance of monitoring computational correctness in SBCs operating under constrained power conditions.
O. Sierra-Herrera, R. Váz, L. Patarroyo-Gutierrez et al.· Computers· 0 citations
This study experimentally evaluates system-level processing and response times in a NodeMCU (ESP8266)-based software implementation of an asynchronous JK flip-flop (JK/FF) chain. Unlike field-programmable gate array (FPGA)-based remote-laboratory or hardware-level propagation-delay studies, the work focuses on timing o...
E. C. Günay Demirel· Journal of new results in sc...· 0 citations
A compact autonomous recorder was developed for short-duration measurements in confined moving systems where event-time cabling is unavailable. The cylindrical platform combines pressure, high-range acceleration, and angular-velocity interfaces with channel-specific conditioning, FPGA/microcontroller control, SDRAM buf...
Chi Li, Pei-Yi Zhou, Wei-Ge Liang et al.· Electronics· 0 citations
RF amplifier modules provide fundamental and indispensable functionality across diverse domains such as aerospace, defence, medical imaging, industrial automation, and scientific research by ensuring reliable operation and robust signal transmission. Their criticality is amplified in high-end applications for example c...
Y. Rani, Gitanjali, Indeewar Kumar· Journal of Reliability and S...· 0 citations
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