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AI-Based Electronic Control Units for Software-Defined Vehicles: A Structured Review of Architectures, Techniques, and Hardware Implementations

Sep 2026 · Zenodo (CERN European Organization for Nuclear Research)
Autonomous Vehicle Technology and Safety

Abstract

The automotive electrical/electronic (E/E) architectureis undergoing a fundamental transformation from looselycoupled, function-specific electronic control units (ECUs)toward domain-centralized, zonal, and fully centralizedcomputing architectures, forming the foundation of emerg-ing software-defined vehicles (SDVs). In parallel, artifi-cial intelligence (AI) and machine learning (ML) are mov-ing from predominantly cloud-based analytics toward di-rect deployment within automotive ECUs, enabling per-ception, prediction, diagnosis, cybersecurity, and adaptivecontrol on resource-constrained embedded platforms. Thispaper presents a structured literature review of AI/ML-enabled ECU design within the SDV paradigm. It firstintroduces ECU fundamentals, functional roles, and in-vehicle networking, including a representative zonal SDVarchitecture integrating controller area network (CAN),CAN with flexible data-rate (CAN-FD), local intercon-nect network (LIN), and automotive Ethernet. Theevolution from distributed to domain, zonal, and cen-tralized architectures is then discussed. Major ECUcategories, including powertrain, transmission and en-ergy management, battery management systems (BMSs),chassis and safety, advanced driver assistance systems(ADAS) and autonomous driving, body control, infotain-ment and connectivity, and gateway, zonal, and central-compute ECUs, are systematically reviewed using func-tional diagrams, AI/ML techniques, datasets, and rele-vant literature. The paper also examines AI/ML train-ing, optimization, compression, validation, and deploy-ment on automotive system-on-chips (SoCs), with em-phasis on the automotive open system architecture (AU-TOSAR) adaptive platform, edge-AI accelerators, over-the-air (OTA) updates, field-programmable gate array(FPGA)-accelerated inference, and application-specific in-tegrated circuit (ASIC)-based implementations. Finally,key challenges in functional safety, real-time determin-ism, explainability, resource constraints, cybersecurity,and reliable software updates are discussed, followed byfuture research directions for efficient and hardware-awareAI/ML integration in SDV-oriented ECU architectures.

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