Computational Primes: A Systematic Framework for Partitioning Neural Network Computation Across Analog and Digital Domains

Abstract

Twelve irreducible operations (P1-P12) with known physical implementations, and four without, as a basis for deciding which parts of a neural network belong in the analog domain. 114 algorithms are factored into these primes; the paper builds a compiler that decomposes a compute graph, assigns each prime to a domain, fuses multi-computation patterns and minimises domain transitions. Version 3. (i) Feedback as a design principle extends to training: a gradient measured on the mismatched forward path lets the normalization affine absorb per-channel mismatch (0.7-0.95 sigma down to 0.06-0.16 sigma, the analytic least-squares floor); the backward path needs sign concordance with the forward crossbar but not reciprocity, and the tolerable number of wrong-sign channels is zero. (ii) The four 'missing primes' are not operations but the four components a finite circuit lacks relative to a Turing machine, so the line they mark is the circuit/software line rather than the analog/digital line; 0 of 114 algorithms are fundamentally unmappable once a compile-time bound is supplied, and 28 entries change status. (iii) A signal-domain axis and a 21-rule mismatch calculus make the design space tractable: the calculus retrodicts 36 measured numbers with none outside a factor 2 and predicts two unseen composites to 1.00x and 1.05x. (iv) The four open validation gaps of version 2 are closed at circuit level. Corrections to the published record. The headline count of version 2 (107 algorithms, 79 M / 22 G / 6 U) did not agree with the supplementary table it summarised, which has 114 rows and 86 M; the M column and the total were understated by seven. The equilibrium gain error 'below 1e-4' is an ideal-integrator figure and becomes 7.2e-4 at a realistic 60 dB integrator gain. The '0.006 %' common-mode entries were a solver quantisation floor and are 0.0024 % / 0.0007 % with a converged solver. The priority claim that no prior work had implemented normalization fully in analog is withdrawn and the prior work cited. Fourteen references inherited from version 2.1 carried a wrong field and are corrected; each correction and its verification source is listed in docs/errata_v2.1.md inside the code archive. Prior versions. The version 2 / 2.1 preprint is publicly indexed under two version DOIs of this same concept record: 10.5281/zenodo.21138358 and 10.5281/zenodo.21179525. This version supersedes 10.5281/zenodo.21179525. Files. prime_compiler_v3.pdf (paper), supplementary_factorizations_v3.pdf (complete factorization table, 114 entries), prime_compiler_v3_code.zip (compiler source, tests, all circuit testbenches and the experiment records each reported number comes from). Source repository: https://github.com/Biech95/prime-compiler