ceceli33/titan-cognitive-core: AkbasCore 2.0 (DRA/Manifold): GPU-Native CUDA Kernel Migration and First Capability-Preservation Benchmark on Qwen2.5-7B-Instruct (Tests 89–92)

Abstract

Abstract: We report the migration of AkbasCore's inference-time, multi-axis activation-steering kernel from a host-side C++ implementation to a GPU-native CUDA kernel, and the first capability-preservation benchmark of this method against real-world evaluation data. The steering framework combines a critically-damped, layer-depth-varying gain envelope (Damped Resonance Alignment, DRA) with native in-kernel Gram-Schmidt orthogonalization across multiple simultaneous steering directions (Manifold). The CUDA kernel was validated against the trusted CPU reference on synthetic data (max absolute difference 4.66×10⁻¹⁰) prior to use on live generation with Qwen2.5-7B-Instruct (4-bit quantized, single NVIDIA T4 GPU). Isolating a CUDA_LAUNCH_BLOCKING synchronization setting raised throughput by a measured ~1.75× with numerically identical per-layer results, isolating and ruling out one candidate bottleneck while leaving the attention-implementation backend as an open, separately-tested variable. A three-pass isolated measurement design (Vanilla / single-axis-steered / multi-axis-steered) applied across 50 diverse open-ended prompts found the primary steering axis's own effect positive in 50/50 cases (mean Δcos = +0.0054, SD = 0.0014) and cross-axis leakage statistically indistinguishable from zero-mean noise (mean Δcos = +0.0003, SD = 0.0018, positive in 26/50 cases — consistent with chance at p ≈ 0.89 under a binomial null). A first capability-preservation check against the canonical MMLU (cais/mmlu) and GSM8K (openai/gsm8k) datasets found a measured accuracy cost of −1.7 percentage points on MMLU (63.3% → 61.7%, n=120) under full multi-axis steering, with GSM8K results (n=80) inconclusive due to low absolute correct-answer counts. All code, raw generation logs, and per-layer telemetry (cosine alignment, gain, and cumulative contribution at every hooked layer, for every generated token) are published in full for independent reproduction. Keywords: activation steering; representation engineering; inference-time intervention; interpretability; mechanistic interpretability; large language models; transformer; multi-axis steering; orthogonalization; Gram-Schmidt; cross-axis interference; cross-axis leakage; capability preservation; MMLU; GSM8K; CUDA kernel; GPU-native inference; low-resource inference; Qwen2.5; activation patching; residual stream; alignment; AI safety evaluation; reproducible AI research 1. Scope of This Release This release consolidates four sequential test iterations (Tests 89 through 92) documenting two developments: (a) migration of the steering kernel from host-side C++ to a GPU-native CUDA implementation, including a verified throughput fix, and (b) the first benchmark of this method's effect on standard language-model capability evaluations, alongside a fivefold-larger replication of the cross-axis interference measurement introduced in prior work (Test 88). This is an interim, development-stage release; broader, systematic benchmarking against additional model families and standard suites remains planned for after the current engine-optimization phase concludes. 2. GPU-Native CUDA Kernel (Test 89) A __global__ CUDA kernel was implemented to execute the steering computation directly on GPU memory, eliminating the CPU↔GPU round-trip present in the prior host-side C++ implementation. Before use on real generation, the kernel was checked against the trusted CPU reference implementation on synthetic test data: maximum absolute difference 4.66×10⁻¹⁰, well within floating-point rounding tolerance for independently-implemented sequential (CPU) versus parallel-reduction (CUDA) summation. The script is designed to automatically fall back to the verified CPU path if this check fails, and did not need to in this run. Contrary to the initial hypothesis, eliminating the CPU↔GPU transfer alone did not measurably change generation throughput (~7–8 tokens/second either way on a single T4 GPU running Qwen2.5-7B-Instruct at 4-bit precision) — an informative negative result ruling out the steering kernel's own data transfer as the dominant bottleneck. 3. Throughput Isolation (Test 90) Code review identified CUDA_LAUNCH_BLOCKING=1 — an environment variable present since early development as a debugging safeguard — as a candidate cause: this setting forces every CUDA kernel launch in the process, including the base model's own matrix-multiplication and attention kernels, to execute synchronously. Setting this to 0 as the sole change (verified via diff against the prior script) raised throughput to ~13.2–13.7 tokens/second, a measured ~1.75× improvement, with per-layer telemetry identical to four decimal places against the prior run — direct evidence that the change affected only execution scheduling, not computed values. 4. Attention-Implementation Isolation (Test 91) — Inconclusive A second candidate — the model's attention backend, previously set via post-hoc config mutation rather than the documented load-time parameter — was isolated as its own single-variable experiment, corrected to use attn_implementation="sdpa" at model-load time with a diagnostic printing the actually-instantiated attention class. The diagnostic returned an ambiguous result (Qwen2Attention, the class name conventionally associated with eager execution, despite requesting SDPA), leaving open whether the request took effect or whether the installed Transformers version uses a unified attention module whose internal dispatch is not reflected in the class name. Throughput rose a further, modest ~5–7%. This variable remains open and is not treated as resolved. 5. Extended Cross-Axis Interference Measurement (Test 92, Part A) The three-pass isolated design from Test 88 (Vanilla / Axis0-Only Steered / Full 3-Axis Steered) was repeated across 50 new, topically diverse, non-overlapping prompts (logic, design trade-offs, short fiction, arithmetic word problems, persuasive argument, empathetic response, scientific analogy, rule-change reasoning, ethical dilemma, and philosophy of mind), replacing the earlier n=10 sample with n=50. Primary axis effect (Δcos, Axis0-Only vs. Vanilla): mean +0.0054, SD 0.0014, positive in 50/50 items. Cross-axis leakage (Δcos, Full vs. Axis0-Only, isolating the effect of two additional steering directions): mean +0.0003, SD 0.0018, positive in 26/50 items — a split statistically indistinguishable from a fair coin (binomial P(X≥26 | n=50, p=0.5) ≈ 0.44; P(exactly 26) ≈ 0.108). 6. First Capability-Preservation Benchmark (Test 92, Part B) Using the canonical, unmodified Hugging Face datasets cais/mmlu (config "all") and openai/gsm8k (config "main"), a fixed-seed (seed=42) random subsample was evaluated under the same three-pass design, scored for exact-match accuracy: MMLU (n=120): Vanilla 76/120 (63.3%); Axis0-Only Steered 74/120 (61.7%); Full 3-Axis Steered 74/120 (61.7%). A measured accuracy cost of 1.7 percentage points from steering is reported directly, not minimized. The identical count under Axis0-Only and Full steering is consistent with the near-zero cross-axis leakage measured independently in Part A. GSM8K (n=80): Vanilla 4/80 (5.0%); Axis0-Only Steered 6/80 (7.5%); Full 3-Axis Steered 4/80 (5.0%). These counts are too small in absolute terms (single-digit correct answers) to distinguish a real effect from sampling noise in either direction and are reported for completeness rather than as a finding. Base-model arithmetic errors (transposed digits, corrupted numeric tokens) were observed in the raw output across all three passes on several arithmetic items, consistent with a 4-bit quantization characteristic under this prompting setup rather than a steering-induced effect, since it appeared independent of whether steering was active. 7. Reproducibility All code and complete raw output (full model generations and full per-layer diagnostic tables for every pass, every item) are published without summarization or selective quoting: Repository: https://github.com/ceceli33/titan-cognitive-core Test 92 code: Test_92_AKBASCORE_2.0_DRA_MANIFOLD_MIXED_BENCHMARK_qwen7B.py Test 92 full raw output: Test_92_Benchmark_Summary.json 8. Related Work Zenodo DOI (AkbasCore 2.0, DRA/Manifold): 10.5281/zenodo.22715555 Zenodo DOI (Test 88, prior cross-scale validation): 10.5281/zenodo.22735745 Citation Akbaş. AkbasCore 2.0 — DRA/Manifold: GPU-Native CUDA Kernel Migration and First Capability-Preservation Benchmark on Qwen2.5-7B-Instruct (Tests 89-92). GitHub repository release v2.0.3-cuda-benchmark, September 2026. https://github.com/ceceli33/titan-cognitive-core