Author

Tian-Tai Deng

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Nov 2026

A Low-Bit-First Multiprecision Processing Element for Energy-Efficient FPGA Implementation

Multiprecision multiply-accumulate (MAC) units from INT2 to FP32 are increasingly needed on field-programmable gate arrays (FPGAs). However, the existing processing element (PE) designs mostly follow application-specific integrated circuit (ASIC)-oriented composition strategies. Their alignment and selection networks m...

Hao-Tian Liu, Xi-Cheng Lu, Ke Li et al. · IEEE Transactions on Very La... · 0 citations

#artificial intelligence Preprint Jun 2026

ITP-STDP: A Hardware-Efficient Intrinsic-Timing Power-of-Two Synaptic Learning Engine for On-Chip SNNs

Intrinsic-timing power-of-two STDP (ITP-STDP) and its corresponding prototype learning engine hardware architecture are presented and demonstrate superior energy efficiency, higher operating speed, and substantially lower hardware resource utilization.

Haihang Xia, Xin-Yu Zhao, Xuecheng Wang et al. · 0 citations