Open access
Aug 2026
Low-power analog integrated implementation of the learning vector quantization algorithm for interdisciplinary applications
A new, energy-efficient, fully analog integrated architecture of the Learning Vector Quantization algorithm, utilizing a 90nm CMOS process, employing the Cadence IC Suite for both the schematic and physical design stages.
Vassilis Alimisis, E. Serlis, Georgios Gennis et al.
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