Juan Salvador Mejía Salvador

A Traceable Design Flow for Synchronous FPGA Architectures From State Machine Specification to Hardware Validation on the Alhambra II Platform

This paper presents a structured, reproducible methodology for the design and FPGA-based implementation of a synchronous digital clock on the open-source Alhambra II platform using IceStudio as the development environment. The proposed approach systematically integrates finite state machine specification, state transit...