Automated Generation of Software-Based Self-Test From ATPG Patterns Targeting Transition Delay Faults in the Decode Stage of the RISC-V-Based Microcontrollers
A novel methodology for automatically generating SBSTs oriented to test TDF models in the decoder unit of microprocessors by leveraging already generated scan-based test patterns is presented, demonstrating the effectiveness of transforming scan-based test patterns into correct functional tests while having moderate fa...