Jul 2026· International Conference on Wireless Communication Technology and Intelligent Signal Processing· Vol 14274, pp. 142740M - 142740M-9· 0 citations· 15 references
Engineering
TL;DR
An end-to-end differentiable encoder-channel-decoder architecture that concurrently educates the bit-to-waveshape relationship using adjustable channel results alongside varying hardware-disadvantages is suggested.
Abstract
Recently emerging wireless and optical wireless links such as THz, FSO, Li-Fi links are very susceptible to channel mismatches and hardware non-idealities so reliable short packet transmissions over tight latency budgets is hard. Thispaper suggests an end-to-end differentiable encoder-channel-decoder architecture that concurrently educates the bit-to-waveshape relationship using adjustable channel results alongside varying hardware-disadvantages. Arate maskallowsfor one model to run at multiple code rates whereas an iteration unrolled decoder will output the soft llr’s with Tbeingused as a latency knob. We add robustness through an SNR curriculum, random link params during training. Andwithn=256 and R=1/2 we get 1.13(dB) (Thz) and 1.21(dB) (FSO) when compared against LDPC and Polar baseline at BLERof 1e-3. Mismatch sweeps show smooth peformance degradation rather than a threshold collapsing. Edge deployment getsa p99 latency of around 0.65ms.
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