This paper presents Ankhdjet, an open-source compiler that lowers a HuggingFace ternary checkpoint to a via-mask program of a fixed compute-in-ROM macro on the open SKY130 PDK, verified end to end with open tools.
Abstract
Large-language-model inference is dominated by weight movement: every generated token re-reads every weight. Ternary quantization (BitNet b1.58) shrinks each weight to 1.58 bits with reported parity at the 2B-parameter scale, small enough that hardwiring the weights into a read-only mask becomes plausible, and a commercial chip (Taalas HC1) has validated hardwired weights on an advanced node behind closed tooling. This paper asks whether model-specific silicon can be made reproducible with entirely open infrastructure. We present Ankhdjet, an open-source compiler that lowers a HuggingFace ternary checkpoint (BitNet b1.58 and its kin) to a via-mask program of a fixed compute-in-ROM macro on the open SKY130 PDK, verified end to end with open tools. We defend two claims: (1) the first open-source weights-to-mask compute-in-ROM compiler on a fabricable open PDK, taken through full open-toolchain signoff (KLayout DRC zero, netgen LVS zero, clean timing) twice with two different weight matrices through an identical flow in which only the mask differs; and (2) the first compute-in-ROM macro submitted for fabrication on an open PDK (TinyTapeout/ChipFoundry SKY130 shuttle ttsky26c, silicon expected 2027). The compiler's read is fully digital (full-swing bitline sampling into standard cells, so the emission ports to any node by synthesis); an analog comparator readout of the same machine is retained as a measured variant, replaced by the digital readout at one eighth the area. We additionally report the per-level adversarial verification methodology that caught three DRC-invisible silent shorts, a negative result on storing two ternary weights per transistor at 130 nm, and which analog sense techniques survive at which nodes. Read energy is from extracted-parasitic simulation (0.98-1.73 pJ per sensed weight); no energy measurements are claimed, and the fabricated vehicles are demonstrators.
ORRAM is a standard-cell-based memory generator built as a native module within OpenROAD, offering a significantly expanded feature set and matching the bit density of historical DFFRAM results while offering a significantly expanded feature set.
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We report the design and end-to-end verification of first-class IEEE-754 binary32 (FP32) and bfloat16 (BF16) arithmetic for ARCH, a hardware description language intended to be generated by language models. Every operator - comparisons, conversions, add, sub, mul, and fused multiply-add (FMA) - is described once agains...
The results show that an unmodified frontier LLM can produce working, correct, and competitive shuttling compilers without additional manual algorithmic engineering, thus reducing the development time for new architectures from several months to a few days.
Fabian Kreppel, Reza Salkhordeh, F. Schmidt-Kaler et al.· arXiv.org· 0 citations
PolyQ, a CPU-oriented compiler/quantization co-design for activation-aware channel-wise bit allocation under a user-specified average-bit budget, shows that fractional-bit CPU deployment is practical, predictable, and energy-efficient across diverse edge targets.
BOLT-FHE shows that a portable, fused-kernel organization with explicit on-chip budgeting can substantially improve TFHE bootstrapping throughput while remaining compatible with both noise management paths.
Yan-Ren Chen, Fang-Yu Zheng, Guang Fan et al.· IACR Transactions on Cryptog...· 0 citations
HORCRUX addresses the difficult trade-off between crypto-agility, high performance, and low resource consumption in constrained environments, a balance typically missing in hardware extensions that focus on limited PQC subsets.
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