On‐Chip Learning With Crossbar Arrays for Adaptive Edge Intelligence
Abstract
ABSTRACT Artificial intelligence (AI) chips can reduce cost, latency, and energy consumption while improving computational efficiency, thereby having the potential to revolutionize AI deployment near sensors. The AI chip architectures are inspired by biological neural networks that integrate memory and computation for emulating synaptic learning within the chip. This review examines the design principles, challenges, and recent advancements in on‐chip learning with memristor‐based crossbar arrays for implementing efficient multiply‐and‐accumulate (MAC) operations and adaptive neural computation. The memristor programming techniques, crossbar integration methods, variability and reliability challenges, and hardware‐software co‐design strategies for scalable and energy‐efficient learning are the key topics explored. We explore analog and mixed‐signal circuit implementations that enable online learning along with the emerging role of generative AI in optimizing chip design, which can eventually provide a pathway toward realizing general intelligence on silicon and near sensors. We propose that advances in neuromorphic and generative AI chips enable real‐time and adaptive intelligence at the sensor edge and can transform applications from autonomous systems to medical diagnostics, setting the stage for hardware‐based general intelligence.
