SPP-GCN: An Efficient GCN Accelerator Under Low Memory Footprint

Abstract

Graph convolutional networks (GCNs) have demonstrated strong capability in modeling graph-structured data and have been widely adopted in various industrial applications. With the rapid growth of edge computing, designing GCN accelerators that maintain high performance under strict resource constraints has become increasingly important. This article presents SPP-GCN, a hardware–software co-optimized accelerator that significantly improves memory efficiency (ME) while maintaining competitive performance. SPP-GCN introduces four hardware–software co-optimization strategies—shuffle, z-merge, concatenation, and preplanning cache—to leverage software-side preprocessing and enhance the graph awareness of the hardware execution pipeline. These techniques effectively improve processing-element utilization and reduce on-chip memory footprint. Evaluated on both GCN and GraphSAGE models across multiple benchmark datasets, SPP-GCN achieves up to $86.9\times $ and $18.85\times $ latency reductions compared with CPU and GPU implementations, respectively. Compared with a prior lightweight accelerator, LW-GCN, SPP-GCN further reduces on-chip memory consumption by 58.5% while achieving up to $1.27\times $ higher relative performance (RP) under the adopted CE/RP-normalized comparison methodology. In addition, although several existing field-programmable gate array (FPGA) accelerators (e.g., BoostGCN, FP-GNN, and Graph-OPU) provide competitive latency, they require significantly larger on-chip memory resources. To better characterize performance density under resource constraints, we further introduce a ME metric that quantifies the RP achieved per unit of on-chip memory. Experimental results show that SPP-GCN consistently achieves the highest ME under the proposed ME metric among the evaluated FPGA-based GCN accelerators. These results demonstrate that the proposed hardware–software co-optimization framework effectively balances performance and resource utilization, making SPP-GCN particularly suitable for memory-constrained edge platforms.