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CASPO: A Convergence-Aware Surrogate-Assisted Political Optimizer for Simulation-Efficient Analog Circuit Design

2026 · IEEE Access · Vol 14, pp. 159400-159417 · 0 citations · 40 references

Abstract

Automated sizing of analog integrated circuits is limited by the cost of SPICE-class simulation, which sets the cost of every optimization loop. Surrogate models promise a cheaper search, but analog exploration visits many non-functional designs—transistors leave saturation, the operating point collapses—and these broken samples corrupt a naively trained regressor. This work presents the Convergence-Aware Surrogate-Assisted Political Optimizer (CASPO), which embeds a convergence-aware, uncertainty-gated surrogate in the Political Optimizer algorithm, a population-based metaheuristic, for both single- and multi-objective sizing. The surrogate is two-stage: a classifier predicts whether a candidate converges, and a regressor trained only on converged samples predicts its performance, so the model learns the valid design region rather than spanning a discontinuity. An uncertainty gate then decides which candidates are simulated, trusting the surrogate only where its predicted error on the binding metric is small. Evaluated on two OTA benchmarks in a 65 nm CMOS technology, CASPO reduces the number of simulations by approximately 31% relative to the conventional Political Optimizer at a comparable design quality, achieving a mean figure of merit of 0.562 against 0.555 on the folded cascode and 0.696 against 0.725 on the two-stage op-amp with one feasible seed conceded. Its multi-objective variant increases the hypervolume of the conventional Political Optimizer from 0.269 to 0.280 on the two-stage op-amp and from 0.308 to 0.324 on the folded cascode while consuming fewer simulations, and leads NSGA-II on both circuits and MOEA/D on the op-amp. Although a fully simulated brain-storm baseline and a sequential-infill surrogate baseline attain the highest hypervolume and optimization quality, respectively, CASPO substantially curtails simulator calls while matching the design quality of its fully simulated engine, covering both problem types within a single framework. The implementation of CASPO is publicly available at https://github.com/hoangtranghcmut/CASPO-analog-sizing

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