Infrared imagers with digital pixel ROICs for large charge handling capacity in MWIR and LWIR applications

Abstract

MWIR and LWIR applications exhibit elevated signal amplitudes that severely constrain available dynamic range and risk driving the analog pixel into saturation. Conversely, the Digital Pixel Sensor (DPS) enables the integration of in-pixel continuous-time oversampling Analog-to-Digital Conversion (ADC), offering the ultra-large Charge Handling Capacity (CHC) required by most of MWIR and LWIR applications. The Pulse-to-Frequency Modulation (PFM) ADC is an oversampling A/D converter, providing the ultra-large CHC, while integrating a compact and energy-efficient electronics. Moreover, its free-running operation allowing a clock free architecture, is a key advantage for large IR Focal Plane Arrays (IRFPA) running at high frame rate (thousands of FPS). In this paper, benefits and limitations of the PFM-based digital pixel ROIC are presented. A prototype is proposed, designed in standard 180 nm / 1.8 V CMOS process with a 36 μm pixel-pitch. The ROIC exhibits a large Charge Handling Capacity (12 Ge−) at video rate (50 FPS) operated in a global shutter Integrated While Read (IWR) mode. Key elements of the PFM structure are evaluated, and optimizations are incorporated into a second prototype (future characterization). The main design challenges and trade-offs for the PFM-based DPS are discussed (speed, accuracy, latency, size, power consumption). Finally, emerging design approaches are explored such as PFM-based DPS employing noise shaping or in-pixel filtering, that will enable the DPS to leverage future CMOS technology scaling.