Jul 2026· Annual International Computer Software and Applications Conference· pp. 1959-1966· 0 citations· 20 references
Computer Science
Abstract
The paper introduces a comprehensive framework for parallel runtime verification designed to monitor concurrent systems that utilise shared-variable communication mechanisms operating under interleaved concurrency model. The proposed framework validates system behaviour during execution to confirm adherence to correctness specifications or identify violations thereof. Concurrent systems necessitate distinct correctness criteria compared to sequential programs, particularly regarding deadlock avoidance and mutual exclusion protocols when multiple processes access shared resources under interleaved concurrency models. Traditional sequential verification frameworks lack the architectural capability to monitor parallel systems effectively, as they are fundamentally designed to track single processes rather than multiple concurrent processes executing simultaneously. This work addresses various challenges in ensuring correctness of parallel programs at both hardware and software layers while providing a theoretical analysis comparing verification methodologies including theorem proving, model checking, testing, and runtime verification. The framework uses Interval Temporal Logic (ITL) as its formal foundation alongside its expressive power for specifying complex temporal properties of parallel systems. A detailed exposition of the framework's core components, their operational roles, and their integration within the overall verification architecture is presented, demonstrating the practical applicability of runtime verification techniques for ensuring correctness in parallel computing environments.
Tulip is a high-performance distributed transaction system that uses sharding for scalability, replication within each shard for fault tolerance, and TAPIR-style inconsistent replication for high performance. Tulip comes with a machine-checked proof of correctness showing that its implementation meets a simple specific...
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Interrupt-driven programs are extensively utilized in embedded systems for safety-critical domains. However, uncertain interleaving executions of enabled tasks with different priorities often lead to concurrency defects. In this context, assertion violation detection is a fundamental method to ensure program correctnes...
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DeterV is a deterministic parallel runtime which uses Verus to verify its correctness and equivalence to serial execution in the input order and attains a 3:1 proof-to-code ratio and incurs only trivial runtime overhead compared to an unverified baseline.
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Signal Temporal Logic (STL) is a popular formalism for the temporal safety properties of cyber-physical systems, most often used for runtime verification. In the synchronous family of languages, safety properties are instead expressed as synchronous observers, modules composed with a program for static verification, wh...
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: A systematic approach is necessary to address concurrency issues, timing violations, and logical safety breaches in healthcare systems, as traditional empirical testing often fails to uncover non-deterministic flaws that can endanger patient safety. This study proposes a rigorous formal verification methodology based...
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