A Breath of Fresh Air: Programmatic Construction for Systemc: Wild-and-Crazy-Idea Paper

Abstract

Chisel has achieved a tremendous impact in chip design. Termed a Hardware Construction Language (HCL), Chisel very effectively eases the creation of RTL models in a Hardware Description Language (HDL), i.e., Verilog. Raising the level of abstraction, system designers use a System-Level Description Language (SLDL), such as SystemC, for modeling and simulation, but there is no standard framework for constructing an application model and generating its corresponding description. In this position paper, we make the case for a new System-Level Construction Language (SLCL) ProCSy that enables the programmatic generation of SystemC models. Using an explicit Application Intermediate Representation (AIR), we outline how SystemC models can be efficiently constructed by automation and convenient programming in Python, rather than being written by hand or generated through ad-hoc scripts.