An 8-bit 10-GS/s 16× Time-Interleaved SAR ADC for Short-Range Wireless Links in 22-nm FDSOI

Abstract

This paper presents an 8-bit, 10-GS/s asynchronous 16-channel time-interleaved (TI) successive approximation register (SAR) analog-to-digital converter (ADC) for high-speed short-range communication systems. The proposed ADC employs a fully asynchronous SAR operation by directly utilizing the output of the dynamic amplifier (DA) and enhances linearity through a metastability detector. Fabricated in a 22-nm FDSOI technology, the prototype occupies 0.097 mm2. At a 200 mV peak-to-peak differential input, the ADC achieves 41.02 dB signal-to-noise-and-distortion ratio (SNDR) and 57.91 dB spurious-free dynamic range (SFDR) at a 4.95-GHz near-Nyquist input after offset, gain, and timing-skew calibrations. The differential nonlinearity (DNL) and integral nonlinearity (INL) are within 0.5 and 0.71 least significant bit (LSB), respectively. Operating at 0.85 V, the ADC consumes 57.3 mW of power and achieves a Walden figure-of-merit (FoM) of 62.4 fJ/conversion-step.