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PALIKV: PM-Resident Learned Index-Based Key-Value Store for the DRAM-PM-SSD Hierarchy

Nov 2026 · IEEE transactions on computers · Vol 75, pp. 3899-3913 · 0 citations · 38 references

Abstract

Persistent memory (PM) bridges the latency and cost gap between DRAM and SSDs. Within the DRAM–PM–SSD hierarchy, deploying key-value-separated key-value stores (KV-separated stores) is imperative for optimizing system longevity and performance. This architecture mitigates SSD write amplification and preserves PM endurance by minimizing writes. Existing KV-separated stores in the DRAM-SSD architecture, however, fail to fully exploit this three-tier hierarchy due to three issues. First, LSM-tree indexes incur high read amplification on PM. While learned indexes offer faster reads, they suffer from severe write-read asymmetry that can undermine overall efficiency in write-intensive workloads. Second, the lack of real-time obsolete data identification delays space reclamation. Third, contemporary KV stores treat PM as a passive write buffer, underutilizing its low read latency under skewed workloads. To address the above issues, we propose PALIKV – a PM-resident learned index-based KV store for the DRAM-PM-SSD hierarchy. We first design an adaptive two-level index that combines a PM learned index with a dynamic DRAM B+-tree buffer. This structure balances lookup efficiency with high write throughput while filtering redundant updates and extending PM lifespan. Second, the learned index enables real-time obsolete data identification. This facilitates an expedited garbage collection with device-specific reclamation granularity, thereby significantly reducing space amplification. Third, a hotness-aware data placement proactively migrates warm data from SSD to PM, allowing PM to serve skewed reads and eliminating the latency-constrained SSD from the critical read path. The experimental results unveil that PALIKV significantly outperforms SOTA KV-separated stores and DRAM-PM-SSD KV stores in terms of throughput and latency.

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