Practical evaluation of an interleaved boost AC-DC converter with power factor correction for a solid-state transformer

Abstract

Solid-state transformers (SSTs) are key enabling technologies for smart grids, offering enhanced controllability, fault isolation, and active power quality improvement over conventional low-frequency transformers. Their front-end AC-DC converter must rectify grid voltage while maintaining a high power factor (PF) and low total harmonic distortion (THD). This paper presents the design, simulation, and hardware validation of a two-phase interleaved boost AC-DC PFC converter for a laboratory-scale SST, operating from 24 V AC to a regulated 48 V DC bus at approximately 100 W. A digital average-current-mode controller with interleaved 180° carriers, implemented on a TI C2000 microcontroller, regulates the DC link and shapes the input current. MATLAB/Simulink results predict approximately 89% efficiency and a well-regulated DC link, while the simulated THD and true power factor fall short of the <5% and >0.95 targets, attributed primarily to input diode-bridge conduction loss and zero-crossing distortion. A DC-bench prototype campaign confirms clean 50 kHz gate drive, correct 180° interleaving with the characteristic frequency-doubled output ripple, accurate sensing, boost operation, and a measured efficiency consistent with simulation. Because the power-factor control is an AC feature, true power factor, THD, and closed-loop regulation are reported from simulation, with full AC characterisation retained as future work. Bridgeless rectification and wide-bandgap devices are recommended to close the performance gap.