Skip to content

X-Stage: An Overlooked Pipeline Stage for Communication-Computation Overlap in DiT Inference

Jul 2026 · arXiv.org · Vol abs/2607.23264 · 0 citations · 45 references
Computer Science

TL;DR

A lightweight Burst-Gap model parameterized by backpressure-free issue time, effective drain rate, and outstanding capacity predicts issue overhead, recovery between bursts, and the onset of backpressure, and two communication-computation fused kernels are redesigned.

Abstract

Fine-grained, device-initiated communication lets persistent GPU kernels in distributed diffusion transformer (DiT) inference issue remote stores and overlap data movement with Tensor Core computation. Existing systems schedule when communication is issued and when received data becomes consumable, but omit post-issue progress before remote-visible completion, making sender backpressure hard to predict. We identify X-Stage, a software-visible post-issue pipeline stage. Measurements on an eight-GPU node with a recent NVIDIA architecture show that short remote-store bursts drain as the issuer resumes work, whereas sustained injection exhausts finite outstanding capacity and delays later issues. A lightweight Burst-Gap model parameterized by backpressure-free issue time, effective drain rate, and outstanding capacity predicts issue overhead, recovery between bursts, and the onset of backpressure. Guided by the model, we redesign two communication-computation fused kernels. For DeepGEMM MegaMoE, interleaving Linear-1 and Linear-2 work across expert waves places computation between concentrated remote-store bursts, yielding a 1.18x geometric-mean and 1.62x maximum kernel speedup over the Expert-Wave baseline across 84 configurations. For Ulysses sequence-parallel attention, tile-granular fusion of the post-attention All-to-All with FlashAttention lets an output-tile owner issue remote stores and resume computation without a dedicated communication warp or streaming multiprocessor. FlashAttention-3 and FlashAttention-4 reach maximum sender-visible speedups of 1.43x and 1.42x over serial execution, and at long sequences their steady-state times approach those of FlashAttention alone. These results establish post-issue progress as a measurable scheduling lever for shaping bursts, avoiding backpressure, and hiding sender-side overhead.

View source

Similar papers

Preprint Aug 2026

Completion-Path Credits: Multi-Resource Control for Scale-Up Fabrics

SemaCredit is presented, a receiver controller that admits each remote-memory operation against a vector of target-resource demands and returns each component when its corresponding HBM, Atomic, or response stage completes, reducing small-operation P99 latency by 52.4% under Atomic contention and 10.2% under response incast.

Fan Yang, Jiaqi Liu, Tao Jiang et al. · 0 citations
Preprint Aug 2026

TIDE-MC: Two-Sided Interpolative Decomposition for Billion-Scale GPU Matrix Completion

Results show that template-anchored decomposition and stage-specific GPU execution can scale matrix completion beyond device-memory capacity, and show that template-anchored decomposition and stage-specific GPU execution can scale matrix completion beyond device-memory capacity.

Chengying Huan, Yu-Bo Wang, Pin-Huan Wang et al. · 0 citations
Book Open access Aug 2026

Turbo: Efficiently Serving Long-Context Large Language Models with In-Network Aggregation

This work proposes Turbo, a first-of-its-kind in-network aggregation system that accelerates long-context inference by offloading query broadcast and attention aggregation to switches and introduces a rolling forward scheme that propagates states to enable cross-stage updates.

Ying Wan, Yuchen Xu, Chuwen Zhang et al. · 0 citations
Jul 2026

Xema: Efficient Diffusion Serving through Fine-Grained Memory Management and Auto-Configuration

Xema is presented, a memory-efficient diffusion serving system that exploits predictable tensor lifetimes for trace-guided memory optimization and introduces an offline planner that jointly selects parallelism, concurrency, and memory control under GPU memory and SLO constraints.

Xueze Kang, Guangyu Xiang, Suyi Li et al. · 1 citation
Preprint Aug 2026

RAC: Reference-Aware Activation Compression for Communication-Efficient Split LLM Inference

System is presented, a reference-aware codec that retrieves exact-token historical spans for prefill uplinks, reuses the reconstructed uplink state for same-round prefill downlinks, and generates boundary-specific decode references with lightweight causal predictors.

Guotao Yang, M. Zhao, Haopeng Li et al. · 0 citations
2025

DynaPipe: Dynamic Layer Redistribution for Efficient Serving of LLMs with Pipeline Parallelism

DynaPipe is a dynamic layer redistribution scheme that adaptively balances computation by predicting execution latency in real time that reduces average end-to-end request latency by 8% to 41% across diverse workloads, outperforming state-of-the-art pipeline parallelism systems.

Hongxin Xu, Tianyu Guo, Xianwei Zhang · 2 citations

We use cookies to run the site and, with your consent, for analytics and to show ads. See our Cookie Policy.