Impact of device architecture on fast and energy-efficient SET in In3Sb1Te2 phase change memory

Abstract

Automotive-grade (Grade-0) phase-change memory (PCM) requires thermally stable materials and device architectures that enable fast SET operation under elevated temperatures. While enhanced thermal stability is essential for high-temperature data retention, it often comes at the expense of slower SET dynamics. Here, we investigate the role of device architecture in the SET process through a systematic study of voltage-dependent threshold-switching dynamics in highly thermally stable In3Sb1Te2 (IST) PCM devices with confined geometries. Time-resolved current measurements under first-fire conditions reveal that confined IST devices exhibit a sub-threshold current density approximately 105 times higher and a delay time approximately 103 times lower than those reported for sandwich-type architectures. Sub-nanosecond switching is achieved at a mere overvoltage of 1.2 × VT, indicating a reduced overvoltage requirement. These results demonstrate that architecture-controlled electro-thermal effects govern SET dynamics, establishing device geometry as a critical parameter for optimizing SET performance in PCM.