Sep 2026· IEEE transactions on computers· Vol 75, pp. 3383-3396· 0 citations· 45 references
Abstract
The growing demand for long-context LLM inference has exposed a critical bandwidth–capacity trade-off in memory systems, rendering single-tier PIM architectures ineffective. HBM-PIMs offer high bandwidth but limited capacity, while DIMM-PIMs provide scalability at the cost of lower bandwidth; neither satisfies the throughput-latency requirements of long-context serving workloads for LLMs. To address this, we propose <bold>HydraPIM</bold>, a heterogeneous multi-tier PIM architecture that decomposes attention computation across HBM-PIM and DIMM-PIM tiers by exploiting the <bold>inherent sparsity</bold> of attention. HydraPIM introduces <bold>HydraAttention</bold>, a tiled attention mechanism with hierarchical reduction, enabling efficient cross-tier execution through lightweight on-chip reduction units. To maintain load balance under dynamic access patterns of sparse attention, HydraPIM features an <bold>importance-aware KV migration</bold> mechanism that monitors token relevance and relocates hot tokens to high-bandwidth tiers at runtime. This software-hardware co-design helps improve the utilization of both bandwidth and capacity. Evaluations show that HydraPIM achieves 1.66<inline-formula><tex-math notation="LaTeX">$\boldsymbol{\times}$</tex-math><alternatives><mml:math><mml:mo mathvariant="bold">×</mml:mo></mml:math><inline-graphic xlink:href="wang-ieq1-3710733.gif"/></alternatives></inline-formula> higher throughput than HBM-based NPU-PIM and 1.96<inline-formula><tex-math notation="LaTeX">$\boldsymbol{\times}$</tex-math><alternatives><mml:math><mml:mo mathvariant="bold">×</mml:mo></mml:math><inline-graphic xlink:href="wang-ieq2-3710733.gif"/></alternatives></inline-formula> lower latency than DIMM-based NPU-PIM across diverse long-context workloads.
FLINT is proposed, a workload-driven HBF substrate for capacity-scalable LLM inference that integrates HBF as a memory-capacity tier alongside HBM while addressing three adoption challenges.
Geraldo F. Oliveira, Arash Tavakkol, Xiang-Yu Zhu et al.· 0 citations
CELLServe formalizes SLO-constrained joint resource provisioning as an optimization problem with a dedicated algorithm, and introduces an opportunistic instance merging strategy for decode phase functions to reclaim fragmented resources.
Zejian Wang, Nan Lin, Zinuo Cai et al.· ACM Transactions on Architec...· 0 citations
Hydra is presented, a common-schema, phase-aware workload characterization framework for LLM inference on edge SoCs that enables reproducible, phase-aware characterization of edge LLM inference.
Amir Taherin, Sana Taghipour Anvari, Charles Amante et al.· 1 citation
FlashAccel integrates HBF into HBM-based GPUs, providing architectural support to mitigate access latency and introduces an HBF-aware storage management layer together with a programming model to organize persistent data in HBF and coordinate heterogeneous memory resources at the system level.
Xinyu Wang, Yalong Xue, Xiaotian Sun et al.· 1 citation
SLIM (Saturation-Aware Lightweight Performance Model), a semi-analytical model that predicts LLM inference throughput and latency from analytical formulations of Transformer computation and memory traffic, is introduced, which outperforms representative performance-modeling baselines while successfully generalizing to previously unseen operating conditions.
Pol G. Recasens, F. Agulló, Yue Zhu et al.· arXiv.org· 0 citations
This work proposes Turbo, a first-of-its-kind in-network aggregation system that accelerates long-context inference by offloading query broadcast and attention aggregation to switches and introduces a rolling forward scheme that propagates states to enable cross-stage updates.
Ying Wan, Yuchen Xu, Chuwen Zhang et al.· Conference on Applications,...· 0 citations
We use cookies to run the site and, with your consent, for analytics and to show ads.
See our Cookie Policy.