Research on Memristors in Hardware Security

Abstract

As the deep integration of the Internet of Things (IoT) and artificial intelligence (AI) technologies has rendered traditional encryption techniques increasingly inadequate in terms of security strength, the implementation of hardware-level security solutions has been identified as a critical issue in the design of information systems. Memristors, as passive circuit components with their intrinsic stochastic switching behavior, multistate storage capability, and low power consumption, have been exploited to provide a viable approach for the construction of hardware security primitives, including true random number generators (TRNGs) and physically unclonable functions (PUFs). In this review, the latest research advances in memristor-based hardware security technologies were systematically surveyed from three perspectives, namely TRNGs, PUFs and other security schemes. With regard to TRNGs and PUFs, respectively, we have systematically summarized their characteristics, including throughput, power consumption and randomness quality, as well as uniqueness, reliability and methods, with particular attention paid to the types of entropy sources and bit-generation strategies. In addition, the potential application of other memristor-based hardware security solutions in information hiding, encrypted transmission and authentication was also analyzed. Subsequently, the principal challenges impeding the transition from laboratory research to mass production were summarized, encompassing synergistic integration with advanced CMOS processes, the balance between reliability and stochasticity, and the absence of design methodologies that integrate hardware and software. Future development trajectories were further delineated, including cross-layer optimization across devices, circuits, and systems, the design of high-security chips resistant to machine learning attacks, CMOS-compatible stable implementation schemes, and the on-chip integration of TRNGs, PUFs, and encryption engines. The present review is intended to serve as a systematic reference for the design of novel hardware security systems, thereby paving the way for the practical deployment of memristor-based security technologies.