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InfiniFlow: Decoupling Virtual Channel Scalability from Buffer Requirements in Lossless Datacenter Networks

Aug 2026 · Conference on Applications, Technologies, Architectures, and Protocols for Computer Communication · 0 citations · 50 references
Computer Science

TL;DR

InfiniFlow is presented, a credit-based hop-by-hop flow control method that supports massive VCs with a limited buffer budget via per-port buffer sharing, and introduces a paradigm shift in buffer management: Upstream Allocates Buffer for Downstream (UABD).

Abstract

Modern datacenters increasingly rely on Remote Direct Memory Access (RDMA) for high throughput and low latency. To ensure lossless transmission, RDMA fabrics employ hop-by-hop flow control at the granularity of Virtual Channels (VCs). However, multiplexing multiple flows within the same VC couples their backpressure behavior, leading to severe congestion spreading, degrading throughput and tail latency significantly. Existing methods try to improve isolation by increasing the number of VCs but require per-VC buffer reservation, causing buffer requirements to scale linearly with the number of VCs and fundamentally limiting VC scalability. We present InfiniFlow, a credit-based hop-by-hop flow control method that supports massive VCs with a limited buffer budget via per-port buffer sharing. InfiniFlow introduces a paradigm shift in buffer management: Upstream Allocates Buffer for Downstream (UABD), where, for each link, the upstream scheduler maintains a per-port shared credit pool and dynamically allocates credits to VCs. Building on UABD, InfiniFlow further incorporates a Buffer Usage Control Protocol that enforces per-VC dynamic credit thresholds using real-time backlog feedback to bound credit consumption and prevent buffer monopolization. With InfiniFlow, the required buffer size per port becomes independent of the number of VCs and is instead bounded by a small budget proportional to per-hop Bandwidth-Delay Product (BDP) (approximately 3× BDP). We implement InfiniFlow on a Xilinx Alveo U280 FPGA and demonstrate support for over 16k VCs using only 401 KB of on-chip memory per port while sustaining 100 Gbps line-rate transmission, achieving 512× and 1024× higher VC scalability than CBFC and PFC, respectively. Extensive NS-3 simulations show that InfiniFlow achieves near-optimal flow completion times under realistic workloads without relying on slow end-to-end rate adaptation, outperforming prior hop-by-hop flow control methods and state-of-the-art congestion control schemes.

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