High-Performance Bayesian Neural Network Inference Accelerator Based on FPGA

Abstract

Bayesian Neural Networks (BNNs) offer robust uncertainty estimation capabilities through probabilistic modeling, yet their prohibitively high computational complexity and resource consumption limit deployment in edge computing. In this paper, we propose an FPGA-based BNN inference accelerator that optimizes critical modules—including weight generation and Feed-Forward inference. By integrating pipelining techniques with distributed storage strategies, our design achieves a balanced trade-off between computational efficiency and resource utilization. Experimental results on the Xilinx ZYNQ7020 platform demonstrate that, at a 100 MHz clock frequency, the accelerator achieves a single-inference latency of 0.05 seconds, achieving speedups of 254.8<inline-formula><tex-math notation="LaTeX">$\times$</tex-math></inline-formula> and 6.2<inline-formula><tex-math notation="LaTeX">$\times$</tex-math></inline-formula> over CPU and GPU platforms, respectively, while offering 28.4<inline-formula><tex-math notation="LaTeX">$\times$</tex-math></inline-formula> higher energy efficiency than GPUs and maintaining a recognition accuracy of 98.4%.