Sep 2026· Proceedings of the 55th International Conference on Parallel Processing· pp. 425-435· 0 citations
Abstract
Modern heterogeneous storage no longer follows a simple fast/slow hierarchy. Byte-addressable NVM provides fine-grained, low-latency persistence, whereas NVMe SSDs deliver high bandwidth under deep queues and offer greater capacity. Most LSM-tree key-value stores, however, send every foreground write through a designated performance tier; SSDs receive data only later through flush, compaction, or migration. When the NVM path saturates, this fixed entry point strands SSD write bandwidth. We present DuetKV, a heterogeneous key-value store that treats NVM and SSD as peer foreground write engines and selects a destination for each request. Saturation-aware routing favors NVM while it has headroom and shifts writes to SSD under pressure. A sync-async interleaved pipeline overlaps synchronous NVM persistence with asynchronous SSD I/O. Size-adaptive cross-tier compaction reclaims NVM space with low write amplification, while transparent read mirrors serve hot SSD-resident data from NVM. On our NVM–SSD prototype, DuetKV achieves up to 3.4 × the throughput of the strongest baseline on write-heavy workloads, while remaining competitive on read-heavy workloads.
Zoned Namespace (ZNS) SSDs expose a sequential-write zone interface that reduces flash-level write amplification and offers cost and capacity advantages over conventional SSDs. Yet this interface creates a semantic mismatch for B+Tree-based storage engines, whose updates are fine-grained and logically in-place. Our wri...
Bo Chen, Jin-Lei Hu, Cheng-Xia Gong et al.· Proceedings of the Internati...· 0 citations
A Lightweight Cache Buffer Management (LCBM) strategy that avoids precise frequency tracking altogether and reduces the average read latency and the write response time, while eliminating the metadata overhead of counter- and LRU-based designs is introduced.
Modern SSDs face a fundamental trade-off between reducing write amplification and maximizing flash-level parallelism. Conventional FTL schemes improve resource utilization through aggressive data distribution, but incur higher garbage collection overhead by intermixing data with different update behaviors. In contrast,...
Dongjun Lee, Han Jang, Youngbin Jin et al.· Proceedings of the 19th ACM...· 0 citations
Log-Structured Merge-tree (LSM) aims to achieve high write throughput, but is known to experience the write stall problems when subjected to sustained write pressure. We quantify the occurrence probability and average duration of write stalls in LSM using a queuing model in the write--flush--compaction pipeline, moving...
Hongsu Byun, Safdar Jamil, Honghyeon Yoo et al.· 0 citations
A simple read interface provides uniform functional semantics, but not equally simple or predictable performance behavior. We use synchronous large-buffer reads in Linux as an observation window and decompose the buffered-read path end to end, distinguishing work volume, processing time, and critical-path exposure. We...
LM-CXD bridges the semantic gap between the serving engine and the device, and exposes NAND-to-DRAM progress to the serving engine, and uses device DRAM as a GPU-accessible buffer to hide NAND latency under limited device DRAM.
Hyunsun Chung, Taewan Noh, Minji Kim et al.· 0 citations
We use cookies to run the site and, with your consent, for analytics and to show ads.
See our Cookie Policy.