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Rethinking RTL DFT: A Discrete RTL Flow for Parallel DFT Integration

Jul 2026 · 2026 IEEE 10th International Test Conference India (ITC India) · pp. 1-6 · 0 citations · 10 references

Abstract

Shift-left DFT methodologies enable early insertion of test logic at the RTL stage, but conventional flows rely on DFT EDA tools to directly insert CODECs, TDRs, MBIST, scan routers, pin multiplexing, boundary scan, and TAP controllers into design RTL, enforcing serial workflows between design and DFT teams, resulting in high tool runtime, license usage, and intrusive design RTL modifications. This paper presents a discrete RTL DFT flow enabling true parallel development at two levels: design-DFT team independence and concurrent wrapper development. Using script-based, modular grey-box abstractions-TestWrap, MemWrap, and IPWrap-the approach decouples DFT integration from functional RTL and continuous tool invocation. A reusable multi-vendor codec library further reduces tool dependency across partitions and projects. Industrial validation across 50 measured design releases demonstrates an average DFT integration turnaround of 3 days, with a worst-case peak of 11 days, while maintaining functional correctness and achieving scalable, cost-efficient shift-left DFT integration in a representative internal deployment.

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