Skip to content

1 paper indexed here

We haven’t gathered this author’s papers yet. Follow them and we’ll fetch their work.

Not the right person? Other researchers publish under this name.

Open access 2026

A 10-bit Synchronous SAR ADC with Dynamic Clock Phase Generation for Ultra-Low Power Mixed-Signal Applications in 45nm CMOS

A dynamic, low-power SAR ADC optimized for low-power mixed-signal applications using 45nm CMOS technology and a modular “divide-and-conquer” verification strategy is implemented to ensure functional correctness and performance reliability.

Y. Wong · 0 citations

We use cookies to run the site and, with your consent, for analytics and to show ads. See our Cookie Policy.