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Y. Lin

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Preprint Sep 2026

Hardware Acceleration of Block-Diffusion LLM for Edge Devices

Single-stream (batch-one) edge inference cannot amortize weight traffic across requests. Full-attention diffusion LLMs recompute the entire sequence at every step; native block diffusion makes completed blocks immutable and exactly cacheable, yet refinement still streams prefix KV and FFN weights. We co-design WIFiV-LPDDR, a wide-I/O LPDDR system for precision-tagged reads, BRQ-KV for a canonical low-rank-plus-INT8-residual prefix with query-dependent per-entry precision, and DAT-FFN for drift-mapped canonical replacement, adjacent-stage-corrected low-bit delta, or cached-state carry while keeping live activations unquantized. Both map to an input-stationary mixed-precision systolic array. For the evaluated 1.5B/7B models on modeled Jetson-class platforms, the full stack provides arithmetic-mean energy-reduction factors of 3.79x/3.96x and arithmetic-mean latency speedups of 2.88x/4.44x at the reported DAT-FFN settings; every corresponding compressed model-benchmark score drops by less than one absolute percentage point from its baseline.

Wei-Hsing Huang, Kiseok Lee, Ming-Yen Lee et al. · 0 citations
Open access Jul 2025

A3D-MoE: Acceleration of Large Language Models With Mixture of Experts via 3-D Heterogeneous Integration

A3D-MoE addresses large language models' challenges with 3-D heterogeneous integration to improve memory bandwidth and reduce NoC overhead/energy, and a hardware resource-aware operation fusion scheduler that fuses attention/MoE operations to boost performance.

Wei-Hsing Huang, Janak Sharda, Cheng-Jhih Shih et al. · 3 citations

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