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Author

Wei Zhang

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Preprint Aug 2026

TherMapNet Attention-Guided Runtime Full-Chip Thermal Map Prediction from Performance Metrics

Runtime thermal management of high-performance chips depends on fast and accurate full-chip thermal maps. Conventional simulators typically estimate power traces from performance metrics first, which adds overhead. This work proposes TherMapNet, an attention-guided thermal simulator that predicts full-chip thermal maps...

Qin Gu, Chao-Fang Ma, Ming-Yu Yang et al. · 0 citations
Preprint Sep 2026

CMD: An Integrated CGRA Framework with Cluster-Based Distributed Memory Design

CMD, an integrated CGRA framework featuring cluster-based distributed memory design with a co-designed compilation toolchain, is proposed, which includes a novel memory-aware mapper and a design space exploration mechanism that identifies the optimal memory architecture design for specific kernels.

Shang-Kun Li, Cheng Tan, Ze-Yu Li et al. · 0 citations

FPGN: Redefining Ultra-Fast Programmable Gate-based Neural Acceleration with Differentiable LUTs

This paper proposes FPGN, an end-to-end physically-aware framework that closes the gap between LUT-native learning and latency-optimized FPGA implementation, and addresses challenges through a hardware-aligned differentiable formulation for training FPGA-native LUT neurons.

Jia-Wei Liang, Haotong Qin, Lin-Feng Du et al. · 1 citation

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