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Analyzing, understanding, and validating the performance of modern processors present significant challenges. These stem from two primary issues. First, it is difficult to construct “performance tests” that can test precisely scoped hypotheses about microarchitectural behavior. Second, it is difficult to make sense of...
Compiler backends are expensive to build and maintain as programming models, workloads, and accelerators evolve. We investigate whether large language models can replace the conventional optimizing and lowering pipeline, a process that we call AI lowering. We study AI lowering from Triton to NVIDIA PTX: an LLM agent tr...
This paper translates Rust code containing RISC-V inline assembly into pure Rust code by emulating each instruction using a machine model extracted from the official RISC-V Sail ISA specification, and demonstrates how each category is handled by the translation.
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