Author

T. Rosing

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Preprint Oct 2026

Compiling Semi-Ring Dynamic Programming to Tier-Aware 3D-DRAM Processing-in-Memory

Processing-in-Memory (PIM) on monolithic 3D (M3D) DRAM is a promising answer to the memory wall for data-intensive dynamic programming (DP), yet extracting its performance today demands hand-written kernels: the programmer must pick a tile size, place data across non-uniform-latency memory tiers, partition work between...

Mahbod Afarin, Tsung-Han Lu, T. Rosing · 0 citations

Preprint Oct 2026

The future of 3D NAND flash technology

It is argued that sustaining NAND scaling will require application-specific co-optimization rather than a monolithic device roadmap, and conventional charge-trap flash, ferroelectric storage, alternative channel materials, and system-level integration are best viewed as complementary solutions targeted to distinct tier...

Prasanna Venkatesan, T. Song, G. Thareja et al. · 0 citations

Sep 2026

EAGER: Edge-Aligned LLM Defense for Robust Cybersecurity Question Answering

Large Language Models (LLMs) are highly effective for cybersecurity question answering (QA) but are difficult to deploy on edge devices due to their size. Quantization reduces memory and compute requirements but often degrades accuracy and increases vulnerability to adversarial attacks. We present EAGER, an edge-aligne...

Onat Gungor, Roshan Sood, Jia-Sheng Zhou et al. · International Symposium on N... · 0 citations

Jul 2026

D-NOVA: In-Storage Retrieval Accelerator via Dual-Bound 3D NAND-Optimized Similarity Search with Vector Adaptation

D-NOVA is a hardware-software co-designed in-storage retrieval accelerator that executes an inverted file (IVF)-based hierarchical retrieval pipeline by deeply embedding the search functionality directly into the NAND memory array, and introduces a lightweight contrastive adapter that maps embedding vectors into a DTS-...

Chang Eun Song, Sumukh Pinge, Tian-Qi Zhang et al. · arXiv.org · 0 citations

Open access Jul 2026

ReLATE+: Unified Framework for Adversarial Attack Detection, Classification, and Resilient Model Selection in Time-Series Classification

ReLATE+ is proposed, a unified framework for adversarially robust and computationally efficient time-series classification that ensures strong performance while reducing the need for retraining, and it generalizes well across different domains with varying data distributions and feature spaces.

C. I. Kocal, Onat Gungor, T. Rosing et al. · Electronics · 0 citations

Book Open access Aug 2026

CCSwitch: A Scalable Data Plane for Non-Blocking In-Network Collective Communication

This work presents CCSwitch, a modular switching fabric built from 4×4 non-blocking Collective Engines, a modular switching fabric built from 4×4 non-blocking Collective Engines (CEs) that combines spatial and temporal parallelism to perform reductions without accumulation buffers.

Sumukh Pinge, Hardik Soni, Bob Lantz et al. · Conference on Applications,... · 0 citations