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Shingo Okada

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Conference Jul 2026

Deterministic Delay Analysis of Periodic Credit-Based Input-Queued Switches under Bounded Arrival Jitter

The rapid emergence of mission-critical applications has shifted network requirements toward strict end-to-end deterministic delay guarantees. While packet-switching infrastructures provide flexibility and scalability, achieving predictable delay remains challenging in the presence of arrival jitter caused by traffic shaper implementations, which are used to regulate packet transmission intervals, and initial timing offsets during connection establishment. This paper presents a theoretical framework for analyzing delay performance in periodic credit-based input-queued switches under bounded arrival jitter, where the jitter does not exceed the transmission period T. We prove that the maximum queueing delay is bounded by 2T when the initial offset Φ = 0, and by 3T during the pre-connection establishment phase, where the initial phase offset between the arrival process and the credit assignment is not yet fixed. Furthermore, we show that the probability that the delay exceeds a given threshold prior to connection establishment is upper-bounded by a distribution obtained via convolution of the Φ=0 case. Numerical results validate the derived bounds and demonstrate that the framework enables reliable worst-case delay estimation without exhaustive simulations.

Takuto Kubo, Shingo Okada, Eiji Oki · 0 citations
Open access 2026

Delay Impact of Bursty Cross Traffic in Combined Input and Output Queued Switches Using Virtual Input Queueing Under Diverse Network and Traffic Conditions

Simulation results show that the CIOQ switch with VIQs effectively isolates critical flow from the impact of bursty flow originating from other input ports, thereby mitigating delay degradation caused by cross-port interference under the examined traffic conditions.

Takuto Kubo, Shingo Okada, Eiji Oki · 0 citations

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