Preprint
Oct 2026
CacheFlex: Direct Software-Managed Access to Higher-Level Cache for Scalable Vector Support
Wider vector/SIMD lanes multiply compute throughput, but cache improvements remain challenging. We identify L1 data cache capacity as the most impactful parameter for performance and efficiency. L1 capacity is constrained by pipeline coupling and latency requirements; private L2 offers an order of magnitude more capaci...
Jing-Qun Zhang, Mao-Hua Nie, Jia-Yi Wang et al.
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