Author

R. Sunketa

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Jul 2026

ATLAS: Automated HLS for DL-Optimized FPGAs

ATLAS is presented, a fully automated flow from a high-level DL model description to a hardware implementation on an FPGA with custom in-fabric DL-optimized hardblocks, requiring no manual RTL design or explicit hardblock instantiation from the end user.

R. Sunketa, Aman Arora · arXiv.org · 0 citations