Author

Nana Sutisna

3 papers indexed here

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Conference Sep 2026

Design Approach of PIN-Diode Driven Reconfigurable Reflective Electromagnetic Surface with Isolated Biasing Network

This paper discusses the design approach of PIN-diode driven reconfigurable reflective electromagnetic surface (RRES) capable of switchable linear-to-circular polarization conversion at the frequency of 2.3 GHz. The unit cell of RRES utilizes a square patch with a diagonal slot, modified with a rectangular strip to acc...

D. A. Nurmantris, R. E. Poetro, Nana Sutisna et al. · International Conference on... · 0 citations

Open access 2026

An Efficient Fully Hardware DQN Accelerator With Parallel Q and Target Networks for Low-Latency Edge AI Application

Deep reinforcement learning (DRL) workloads such as Deep Q-Networks (DQNs) require repetitive forward evaluations of both the Q-network and the target network, which leads to high training latency and inefficient resource utilization on edge System-on-Chip (SoC) platforms. This paper presents an efficient parallel doub...

A. Sumarudin, Andi M. Riyadhus Ilmy, Nana Sutisna et al. · IEEE Access · 0 citations

Review Open access 2026

A Comprehensive Review on Hardware Accelerator for YOLO Model Using Sparse Data

Object detection plays a crucial role in image processing and data analysis by enabling the extraction of visual information that supports decision-making across diverse practical domains. Applications of object detection span intelligent healthcare, autonomous vehicles, surveillance, robotic vision, and precision agri...

D. Endrawati, I. Syafalni, Nana Sutisna et al. · IEEE Access · 0 citations