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Author

Komathy Vanitha Krishnan

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Open access Sep 2026

Energy-efficient approximate multipliers and adders for multimedia computing applications: Design and evaluation of novel optimized arithmetic circuits with enhanced accuracy

This article proposes high-performance simplified approximate adders through logic-level reduction using the Cadence Genus Synthesis Solution at the 45 nm technology node and demonstrates enhanced error characteristics compared with existing designs.

Komathy Vanitha Krishnan, N. Priya, Manikandan D et al. · 0 citations

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