#artificial intelligence
Jul 2026
DART-VLN: Test-Time Memory Decay and Anti-Loop Regularization for Discrete Vision-Language Navigation
DART-VLN is presented, a training-free inference-time framework that combines Test-Time Memory Decay, which reweights stale and redundant memory slots without modifying their stored content, with Anti-Loop Regularization, a lightweight next-hop penalty that discourages immediate reversals.
Shaoheng Zhang, Zhi-Cheng Li, Guang-Fu Ma et al.
· arXiv.org · 0 citations