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Open access Aug 2026

High-Performance SM2 Signature Hardware Architecture Based on Precomputation and Parallel Scheduling

A high-throughput ASIC architecture that integrates precomputation with parallel task scheduling to accelerate SM2 signature generation and achieves the lowest Area–Time (AT) product among the compared works, indicating that the architectural innovation achieves a favorable AT trade-off for high-throughput applications...

Jie Huang, Ming-Fu Zhong, Zuo-Nan Xiao · 0 citations

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