(Almost) quadruply optimal unitary designs in 1D
We construct $n$-qubit approximate unitary $k$-designs in 1D systems, achieving circuit depth $O(\log(n/\varepsilon) + k\log k)$ with relative error $\varepsilon$ and requiring $O(nk\log k)$ magic gates. This matches existing lower bounds $\Omega(\log(n/\varepsilon) + k)$ for circuit depth, and $\widetilde{\Omega}(nk)$...