Author

Harsh Songara

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Preprint Oct 2026

Trail: Scalable and Low-Cost Temporal TLB Prefetching via Page-Table-Embedded Deltas

Address translation is a major bottleneck in data-intensive workloads. TLB prefetching can hide translation latency, but existing spatial prefetchers struggle with irregular accesses, while temporal prefetchers store address deltas in fixed-capacity hardware that cannot scale with application memory footprints. Our cha...

K. Kanellopoulos, Konstantinos Sgouras, Harsh Songara et al. · 0 citations

Preprint Sep 2026

Argus: Agentic, Reference-Calibrated, Tree-Guided, System-Software-Level Bottleneck Localization

Operating system (OS) code can account for a substantial share of CPU execution time. First, as application logic is offloaded to heterogeneous accelerators (e.g., GPUs), the CPU increasingly acts as an orchestrator, spending cycles in driver calls, data movement, and synchronization rather than in application code. Se...

Vlad-Petru Nitu, Harsh Songara, Konstantinos Sgouras et al. · 0 citations