Bridging LLM Serving and CXL-SSDs with Chunk-Aware KV Cache Management
LM-CXD bridges the semantic gap between the serving engine and the device, and exposes NAND-to-DRAM progress to the serving engine, and uses device DRAM as a GPU-accessible buffer to hide NAND latency under limited device DRAM.
Hyunsun Chung, Taewan Noh, Minji Kim et al.
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