G. Payá-Vayá

NanoLogicController: A Minimal Open-Source ASIP for Accelerated Gate-Level Netlist Emulation

Following Moore's Law, the ever-increasing complexity, i.e., the number of logic gates, of digital systems poses significant challenges for verification at the netlist (i.e., logic gate) level. On the one hand, the inherent bit-level parallelism exposed by netlists cannot be efficiently exploited to accelerate simulati...