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Fei Wu

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Book Open access Sep 2026

MiTDM: Eliminating False Conflicts in Scalable MVCC in Disaggregated Memory

MiTDM introduces a hierarchical block version chain that combines the benefits of array and chained structures, supporting dynamic version expansion while maintaining low-latency access, and achieves up to 80.1% higher throughput compared to FaRMV2 and 42.7% higher than Motor.

Ao-Xin Wei, Jin-Tian Wu, Jian Zhou et al. · 0 citations
#machine learning Preprint Sep 2026

PulseInfer: I/O-Centric Sparse KV Cache Offloading for Efficient Long-Context LLM Decoding

PulseInfer hides variable recall latency with interruptible layer-wise scheduling, adapts offloading decisions with IO-Adaptive Offloading Admission, and coalesces fragmented transfers using SoloHead sparse selection and a gather-scatter I/O engine.

Qiu-Yang Zhang, Kai Zhou, Kai Lu et al. · 0 citations
Book Open access Sep 2026

MiTDM: Eliminating False Conflicts in Scalable MVCC in Disaggregated Memory

Disaggregated memory architecture has gained wide adoption in cloud and high-performance systems [18, 31, 43] due to its decoupled resource model, elasticity, and low-latency access. In such architectures, transaction mechanisms must ensure atomic and consistent access to remote memory. Prior designs use array-based ve...

Ao-Xin Wei, Jin-Tian Wu, Jian Zhou et al. · 0 citations

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