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Enzo Tartaglione

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#machine learning Preprint Sep 2026

Validity-Preserving Hierarchical RL for Joint Routing and Switch Placement in EDA

Routing and switch placement are fundamental combinatorial optimization problems in chip design, requiring the joint optimization of routing topology and physical placement under strict structural, geometric and logical constraints. Existing approaches typically rely on carefully engineered heuristics that incorporate...

Dorian Gailhard, Ugo Lecerf, Enzo Tartaglione et al. · 0 citations
Conference Open access Aug 2026

CutClean: Neural Network Pruning for Privacy-Preserving Inference

CutClean is a privacy-aware pruning method that allows to reduce privacy information flow through the network, while increasing its sparsity, and effectively minimizes private information flow while achieving high sparsity rates and preserving classification target accuracy.

Leonardo Magliolo, Vito Paolo Pastore, Giuseppe Valenzise et al. · 0 citations
#machine learning Preprint Sep 2026

From Deep to Shallow: Unconstrained and Efficient Layer Merging Strategy

This work proposes an efficient strategy that enables merging of layers without an existing analytical solution, and also without increasing kernel size, and validate the approach across multiple architectures and datasets, and measure inference speed-up gains on real embedded platforms.

P. Shul'zhenko, Gabriele Spadaro, Enzo Tartaglione · 0 citations

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