Network epidemic simulation enables fine-grained understanding of epidemic behavior. However, empirical samples of interaction networks display properties that are challenging to capture with popular synthetic models of networks. Our empirical results show that epidemic spread behavior is sensitive to a form of multi-scale local structure that is absent in common baseline models, (e.g., Erdős–Rényi, Chung-Lu, etc). This structure critically impacts the effect of local quarantining and stops epidemic spread in samples of interaction networks, even when it cannot be halted in simple synthetic models of those networks. Insights from our analysis include how epidemics on networks with widespread multi-scale local structure are easier to mitigate, as well as characterizing which nodes are ultimately not likely to be infected. We demonstrate that this structure results from more than just local triangle structure in the network, and we illustrate processes based on homophily or social influence and random walks that suggest how this multi-scale local structure arises and use it to cleanly isolate intervention sensitivity to multi-scale local structure.
Omar Eldaghar, Michael W. Mahoney, D. Gleich· PLOS Complex Systems· 0 citations
Manycore architectures are a promising direction for single-chip performance. They typically use in-order cores and caches as building blocks and can produce good performance on regular applications. However, on irregular applications, they have low core utilization due to data-dependent control-flow and memory access. We propose UpDown manycore that employs a novel core with Event-Driven Scheduling (EDS), Software-controlled Lightweight Threading (SLT), and Split-transaction Memory Access with software synchronization (SMA) to deliver both high core utilization and chip performance. On a variety of graph and sparse applications, UpDown outperforms a much larger commercial multicore chip (20-core, OoO) by up to 81x. Compared to simple, in-order cores, the UpDown core’s novel mechanisms provide a 2.4-5.9x performance advantage, specifically 1.9x (EDS), 1.4x (SLT), and 1.4x (SMA). For a manycore chip, these architectural benefits enable a 2048-core UpDown to outperform an 8192-core in-order chip of similar Si area by 3.1x overall. By efficiently scheduling computation from many parallel threads, UpDown achieves high core utilization. Further, UpDown mechanisms enable it to more effectively exploit the growing bandwidth available from HBMs and tolerate higher NoC latencies, supporting future scaling. Finally, we also show that UpDown achieves better performance than a state-of-the-art GPU normalized by area.
Andronicus Rajasukumar, Ruiqi Xu, Tianchi Zhang et al.· International Conference on...· 1 citation
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